Alif Semiconductor /AE302F80F55D5AE_CM55_HP_View /DMA1_SEC /DMA_INTEN

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Interpret as DMA_INTEN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0EVENT_IRQ_SELECT

Description

Interrupt Enable Register

Fields

EVENT_IRQ_SELECT

Program the appropriate bit to control how the DMAC responds when it executes DMASEV. Bit [N] = 0x0: If the DMAC executes DMASEV for the event-interrupt resource N then the DMAC signals event N to all of the threads. Bit [N] = 0x1: If the DMAC executes DMASEV for the event-interrupt resource N then the DMAC sets IRQ[N] high. Note: For more information about selecting an event number, see Section DMASEV.

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